Understanding Chiplets: How They Work and Why They're the Future of Hardware

Understanding Chiplets: How They Work and Why They’re the Future of Hardware

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¿Qué son los chiplets? ¿Cómo funcionan y por qué son el futuro del hardware?

Chiplets are not a novelty, as they have been present since AMD introduced its Ryzen 3000 desktop CPUs. However, time flies, and the concept of creating what was once a single-piece chip is becoming increasingly uncommon. You may be familiar with the monolithic chip concept. But, what drives this trend and what limitations and benefits are there in designing and manufacturing new semiconductors? Keep reading if you want the answers.

The chiplet concept, or tile as Intel calls it in its marketing, consists of designs made up of multiple chips or tiles. This involves separating or disaggregating a single chip. The trend is not merely a fad, as it is increasingly being adopted by various manufacturers for different designs, and more and more are following this approach.

What are chiplets?

Multichip systems have existed since the dawn of computing. However, when referring to chiplets, we’re not talking about the classic MCM (Multi-Chip Module). Instead, we’re discussing the disaggregation or separation of a chip into distinct ones, each with a different function within the whole. This is the opposite of component integration resulting from the downsizing of different transistors via lithography.

Nevertheless, more and more chiplet-based designs are entering the market. Not only do these involve splitting a chip into different pieces, but they often also involve dividing them between different manufacturing processes. The main reason for doing this is to overcome the size limit of a single-piece (monolithic) chip, which is defined by the size of photomasks. These cannot exceed 26 mm wide by 33 mm high—858 mm². Due to the use of amorphous lenses in High-NA EUV lithography, this size will be reduced by half to 429 mm².

Thus, the evolution to multi-architecture chiplets responds mainly to two obstacles. The first is overcoming the chip’s size limit, and the second is preparing everything for a future where any design larger than 429 mm² will have to use multiple chips due to obvious physical limitations.

Additional economic factors that justify their existence

While the current idea of dividing a chip into different chiplets due to lithography reasons might not seem justified in the consumer PC world, it does make sense in certain contexts. For example, AMD’s CPU and GPU design uses a chiplet-based approach not just to split everything randomly; it aims to create a repeatable part within the chip to scale its various designs.

For instance, the CCD (Core Chiplet Die) of AMD’s CPUs can be used across their entire processor range, including Ryzen, Threadripper, and EPYC. This can be done without needing a new set of cores. With GPUs, we have the MCD, the memory interface, and the last-level cache, which are also replicated components.

Another factor is the high costs of development and deployment of new lithographies that cannot be covered within the lifespan of just a few product generations. That’s why chiplets of different lithographies, and sometimes from different manufacturers, are used in the design and production of each chip.

A clear example is Intel’s new Core Ultra processors (Meteor Lake), which feature a chiplet design divided into five parts (CPU Tile, iGPU Tile, SoC, I/O Die, and 3D Forevos die base). These combine no fewer than four manufacturing processes: Intel 4, Intel 16, and TSMC at 6 nm and 5 nm.

Existing limitations

In some designs, especially GPUs, which require massive bandwidths for intercommunication between the different parts, separating chips and increasing the length of internal cables can lead to increased energy costs in data transfer.

That’s why many designs use an interposer, a chip placed at the base that allows intercommunication between different parts. With an interposer, communication with different chips occurs vertically. Typically, interposers are large and manufactured using an older manufacturing node than the rest.

Interposers in a chiplet reduce energy consumption by increasing the number of interconnections, allowing lower clock speeds and voltages for the same bandwidth.

A downside is the extra manufacturing steps and complexity that an interposer adds, increasing the cost and the likelihood of failures during the manufacturing process. However, as mentioned earlier, the adoption of High-NA EUV lithography will force the use of interposers in several designs, particularly those with a GPU like Intel’s Meteor Lake.

The future of chiplets: different brands in a single design

Currently, disaggregated microprocessors use components from the same designer, regardless of the manufacturer. Thanks to the Universal Chiplet Interconnect Express (UCIe) intercommunication standard, it will soon be possible to mix and match pieces from different manufacturers and designs.

Modularity will change the industry. For example, future consoles might have an AMD CPU and an integrated NVIDIA GPU as chiplets. Memory controllers in graphics chips might all come from a common supplier. Specific accelerators, image processing units, and other components may be outsourced to specialized companies instead of being produced in-house.

Moreover, interposers are transitioning from being mere communication pathways to integrating additional functionalities. This could include support units or last-level global caches in specific designs. To see the first heterogeneous designs with components from different manufacturers, we’ll still have to wait a little longer.

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